AI Tools Compared

Best AI Tools for Writing Makefiles in 2026

Makefiles look simple but hide a lot of footguns: tab vs space errors, missing .PHONY declarations, broken dependency tracking, and shell quoting issues that only surface in CI. AI tools vary significantly in how well they handle these.

The Test: A Real C Project Makefile

The benchmark task: generate a Makefile for a C project with a src/ directory, separate obj/ for object files, a test target using a test runner, and clean/install targets. The output must use pattern rules, not repeated rules per file.

Claude

Prompt:

Write a Makefile for a C project. Source files are in src/, object files go in obj/.
Binary name: myapp. Include: all, clean, install, test targets.
test runs ./tests/run_tests. Use pattern rules for compilation.
CC=gcc, CFLAGS=-Wall -Wextra -O2. Add proper .PHONY declarations.

Output:

CC      := gcc
CFLAGS  := -Wall -Wextra -O2
LDFLAGS :=
TARGET  := myapp
PREFIX  := /usr/local

SRC_DIR := src
OBJ_DIR := obj
TEST_BIN := tests/run_tests

SRCS := $(wildcard $(SRC_DIR)/*.c)
OBJS := $(patsubst $(SRC_DIR)/%.c,$(OBJ_DIR)/%.o,$(SRCS))

.PHONY: all clean install uninstall test

all: $(TARGET)

$(TARGET): $(OBJS)
	$(CC) $(LDFLAGS) $^ -o $@

$(OBJ_DIR)/%.o: $(SRC_DIR)/%.c | $(OBJ_DIR)
	$(CC) $(CFLAGS) -c $< -o $@

$(OBJ_DIR):
	mkdir -p $@

test: $(TARGET)
	$(TEST_BIN)

install: $(TARGET)
	install -d $(DESTDIR)$(PREFIX)/bin
	install -m 755 $(TARGET) $(DESTDIR)$(PREFIX)/bin/$(TARGET)

uninstall:
	rm -f $(DESTDIR)$(PREFIX)/bin/$(TARGET)

clean:
	rm -rf $(OBJ_DIR) $(TARGET)

Claude’s output is excellent. It uses := for immediate assignment (correct for performance), adds | $(OBJ_DIR) order-only prerequisite so the directory is created before compilation, uses $^ and $< automatic variables correctly, and includes DESTDIR support in install — a detail many miss. .PHONY is complete.

Copilot (in VS Code)

Copilot generates competent Makefiles from inline comments but tends to skip the order-only prerequisite pattern. It often writes individual rules for each source file rather than using $(wildcard) + $(patsubst), which breaks when you add new files. Good for quick single-file projects, weaker for structured multi-file setups.

ChatGPT (GPT-4o)

ChatGPT produces valid Makefiles but frequently uses = instead of := for variable assignment, which causes recursive expansion issues in larger builds. It also sometimes omits .PHONY for clean, leading to silent failures if a file named clean exists.

Multi-Language Makefile: Go + Generated Code

A harder test: a project with a Go binary and generated protobuf code.

Prompt:

Makefile for a Go project. Targets: build (go build ./cmd/server), generate (runs protoc on proto/*.proto),
lint (golangci-lint run), test (go test ./...), docker-build.
Use $(shell go env GOPATH) for tool paths. Enforce that generate runs before build.

Claude output:

GOPATH  := $(shell go env GOPATH)
BINARY  := server
CMD_DIR := ./cmd/server
PROTO_DIR := proto
PROTO_OUT := internal/pb

PROTOC_GEN_GO := $(GOPATH)/bin/protoc-gen-go
PROTOC_GEN_GRPC := $(GOPATH)/bin/protoc-gen-go-grpc

IMAGE_NAME := myapp
IMAGE_TAG  := $(shell git rev-parse --short HEAD)

.PHONY: all build generate lint test docker-build clean

all: generate build

build: generate
	go build -o bin/$(BINARY) $(CMD_DIR)

generate: $(PROTO_GEN_GO) $(PROTO_GEN_GRPC)
	protoc \
		--go_out=$(PROTO_OUT) \
		--go-grpc_out=$(PROTO_OUT) \
		--go_opt=paths=source_relative \
		--go-grpc_opt=paths=source_relative \
		-I $(PROTO_DIR) \
		$(PROTO_DIR)/*.proto

lint:
	golangci-lint run ./...

test:
	go test -race -coverprofile=coverage.out ./...
	go tool cover -func=coverage.out

docker-build:
	docker build -t $(IMAGE_NAME):$(IMAGE_TAG) .

clean:
	rm -rf bin/ coverage.out $(PROTO_OUT)/*.pb.go

Claude correctly chains build to depend on generate, uses $(shell git rev-parse --short HEAD) for image tagging, and adds -race to test. GPT-4o missed the generate → build dependency and used a hardcoded image tag.

Recursive Makefiles

For monorepos with subdirectories, Claude handles recursive make correctly:

Prompt:

Write a root Makefile that recurses into subdirectories listed in SUBDIRS.
Each subdir has its own Makefile. Support: all, test, clean with proper error propagation.

SUBDIRS := auth api gateway worker

.PHONY: all test clean $(SUBDIRS)

all: $(SUBDIRS)

$(SUBDIRS):
	$(MAKE) -C $@ $(MAKECMDGOALS)

test clean: $(SUBDIRS)

# Propagate any target to subdirs
%:
	$(MAKE) -C $(SUBDIRS) $@

The $(MAKE) -C $@ pattern and MAKECMDGOALS forwarding are correct. One gotcha: Claude sometimes generates the catch-all % rule which can interfere with built-in rules. Ask it to remove that if you hit issues.

Makefile for a Mixed C/C++ Project

When source files are split between C and C++, the pattern rules need to handle both extensions:

Prompt:

Write a Makefile for a project with .c files in src/c/ and .cpp files in src/cpp/.
Both compile to obj/. Use g++ for linking. Support debug and release builds
via a BUILD variable. Default to release.

Claude output:

CC      := gcc
CXX     := g++
BUILD   ?= release

ifeq ($(BUILD),debug)
  CFLAGS   := -Wall -Wextra -g -O0 -DDEBUG
  CXXFLAGS := -Wall -Wextra -g -O0 -DDEBUG -std=c++17
else
  CFLAGS   := -Wall -Wextra -O2 -DNDEBUG
  CXXFLAGS := -Wall -Wextra -O2 -DNDEBUG -std=c++17
endif

TARGET  := myapp
SRC_C   := src/c
SRC_CPP := src/cpp
OBJ_DIR := obj/$(BUILD)

C_SRCS   := $(wildcard $(SRC_C)/*.c)
CPP_SRCS := $(wildcard $(SRC_CPP)/*.cpp)
C_OBJS   := $(patsubst $(SRC_C)/%.c,$(OBJ_DIR)/%.o,$(C_SRCS))
CPP_OBJS := $(patsubst $(SRC_CPP)/%.cpp,$(OBJ_DIR)/%.o,$(CPP_SRCS))
ALL_OBJS := $(C_OBJS) $(CPP_OBJS)

.PHONY: all clean debug release

all: $(TARGET)

debug:
	$(MAKE) BUILD=debug

release:
	$(MAKE) BUILD=release

$(TARGET): $(ALL_OBJS)
	$(CXX) $^ -o $@

$(OBJ_DIR)/%.o: $(SRC_C)/%.c | $(OBJ_DIR)
	$(CC) $(CFLAGS) -c $< -o $@

$(OBJ_DIR)/%.o: $(SRC_CPP)/%.cpp | $(OBJ_DIR)
	$(CXX) $(CXXFLAGS) -c $< -o $@

$(OBJ_DIR):
	mkdir -p $@

clean:
	rm -rf obj/ $(TARGET)

The ?= operator for BUILD is correct — it allows callers to override via make BUILD=debug or environment variable. Claude puts objects in obj/$(BUILD) so debug and release artifacts don’t collide. GPT-4o typically outputs a single CFLAGS block and loses the build variant distinction.

Debugging Common Makefile Issues with AI

Claude is useful for diagnosing Makefile errors when you paste the error output:

Prompt:

My Makefile fails with: "make: Nothing to be done for 'test'."
Here's the relevant section:
test:
    pytest tests/

Claude immediately identifies the issue: there’s likely a file or directory named test that satisfies the target, and test isn’t declared .PHONY. It provides the fix:

.PHONY: test
test:
	pytest tests/

This diagnostic capability is where Claude outperforms the other tools — GPT-4o often suggests checking the Makefile syntax without identifying the specific .PHONY omission, and Copilot doesn’t handle error-diagnosis prompts well outside of IDE inline suggestions.

Dependency File Generation (Auto-deps)

For large C projects, manually tracking header dependencies breaks incremental builds. Claude can generate automatic dependency tracking:

Prompt:

Extend the C Makefile to auto-generate dependency files (.d) for each source file
so that changes to headers trigger recompilation of dependent .c files.

Claude output:

DEPFLAGS = -MT $@ -MMD -MP -MF $(OBJ_DIR)/$*.d
DEPS := $(OBJS:.o=.d)

$(OBJ_DIR)/%.o: $(SRC_DIR)/%.c $(OBJ_DIR)/%.d | $(OBJ_DIR)
	$(CC) $(DEPFLAGS) $(CFLAGS) -c $< -o $@

$(OBJ_DIR)/%.d: ;
.PRECIOUS: $(OBJ_DIR)/%.d

-include $(DEPS)

The -MMD -MP -MF flags generate dependency files as a side effect of compilation. The -include $(DEPS) at the end silently includes them (the - prefix suppresses errors when .d files don’t exist yet on first build). The empty rule $(OBJ_DIR)/%.d: ; and .PRECIOUS marker prevent make from deleting .d files as intermediate targets.

GPT-4o generates the -MMD flag correctly but typically forgets -MP (which adds phony targets for each dependency, preventing errors when headers are deleted) and omits the .PRECIOUS declaration.

Parallel Builds and Job Control

One prompt that AI tools often get wrong is parallel build configuration. Adding -j support requires care:

Prompt:

Extend the C Makefile to support parallel builds safely. Add a make check target
that verifies the required tools (gcc, install) are available before starting the build.

Claude output:

# Detect available CPU cores for -j flag
NPROC := $(shell nproc 2>/dev/null || sysctl -n hw.ncpu 2>/dev/null || echo 4)

.PHONY: check-tools

check-tools:
	@command -v $(CC) >/dev/null 2>&1 || \
		{ echo "ERROR: $(CC) not found. Install gcc."; exit 1; }
	@command -v install >/dev/null 2>&1 || \
		{ echo "ERROR: install not found."; exit 1; }

# Make all depend on check-tools to run the check first
all: check-tools $(TARGET)

# To build in parallel, run: make -j$(nproc)
# Or set it in the Makefile:
.DEFAULT_GOAL := all

The nproc || sysctl -n hw.ncpu fallback handles both Linux and macOS. Claude adds the @ prefix on the check commands to suppress command echoing, which keeps the output clean. GPT-4o typically generates the check but forgets the @ prefix, producing noisy output.

Prompt Engineering Tips for Makefiles

A few patterns that consistently improve AI Makefile output:

Be explicit about tab indentation. Include “All recipe lines must use tabs, not spaces” in your prompt. This prevents the most common Makefile error, especially from tools that auto-correct indentation.

Specify the Make version. GNU Make 4.x added some features (grouped targets, != shell assignment) not available in older versions. Saying “Target GNU Make 3.82 for maximum compatibility” keeps output portable.

Ask for a test at the end. “Add a check that prints the resolved variable values when you run make print-vars” produces a useful debugging target:

.PHONY: print-vars
print-vars:
	@echo "CC      = $(CC)"
	@echo "CFLAGS  = $(CFLAGS)"
	@echo "SRCS    = $(SRCS)"
	@echo "OBJS    = $(OBJS)"
	@echo "TARGET  = $(TARGET)"

This pattern is something Claude generates without being asked when you include “production Makefile” in the prompt, while GPT-4o and Copilot rarely include it unprompted.

Conditional Compilation and Platform-Specific Rules

AI tools often struggle with platform-specific build logic. Here’s a prompt that works:

Write a Makefile that builds on Linux and macOS.
On macOS: use clang and add -fPIC. On Linux: use gcc and add -fstack-protector.
Add a detect-os target and conditional flags.

Claude output:

UNAME := $(shell uname)

ifeq ($(UNAME),Darwin)
    CC := clang
    CFLAGS += -fPIC
    LDFLAGS += -lm
else ifeq ($(UNAME),Linux)
    CC := gcc
    CFLAGS += -fstack-protector
    LDFLAGS += -ldl -lm
else
    $(error Unsupported platform: $(UNAME))
endif

.PHONY: detect-os
detect-os:
	@echo "Platform: $(UNAME), Compiler: $(CC)"

all: detect-os binary

binary: $(OBJS)
	$(CC) $(LDFLAGS) $^ -o $@

Claude correctly uses $(shell uname) for platform detection and conditional assignment. One limitation: it doesn’t always handle cross-compilation toolchains (e.g., building ARM from x86).

Common Makefile Mistakes AI Tools Make

Understanding what Claude and competitors get wrong helps you validate output:

Always review the dependency tracking. A correct Makefile for a 200-file C project should touch only the object files for changed sources, not recompile everything.

Advanced: Generating Dependencies with gcc -MM

For C/C++ projects, ask Claude to add automated header dependency generation:

Add a target that generates .d dependency files using gcc -MM.
Each source file src/foo.c should generate obj/foo.d with all headers it depends on.
Include these .d files so make rebuilds when headers change.

Claude will produce something like:

DEPS := $(OBJS:.o=.d)

obj/%.d: src/%.c
	@mkdir -p $(dir $@)
	$(CC) -MM $(CFLAGS) $< > $@

include $(DEPS)

obj/%.o: src/%.c
	$(CC) $(CFLAGS) -c $< -o $@

This ensures that editing a header automatically triggers recompilation of all dependent source files — a feature many developers don’t realize they need.

Testing Makefiles with Dry-Run

When Claude generates a complex Makefile, validate it with make -n before running for real:

make -n all  # Print commands without executing

Check the output to ensure:

  1. Correct compilation order
  2. Variables expand properly
  3. Pattern rules generate correct paths
  4. No circular dependencies

Advanced Patterns: Dependency Tracking and Incremental Builds

The real test of a production Makefile is whether it tracks dependencies correctly for incremental builds. A Makefile that always recompiles everything is no better than a shell script.

For C projects, Claude generates proper dependency tracking using compiler-generated .d files:

CC      := gcc
CFLAGS  := -Wall -Wextra -O2
DEPFLAGS = -MT $@ -MMD -MP -MF $(DEP_DIR)/$*.d

SRC_DIR := src
OBJ_DIR := obj
DEP_DIR := .deps

SRCS := $(wildcard $(SRC_DIR)/*.c)
OBJS := $(patsubst $(SRC_DIR)/%.c,$(OBJ_DIR)/%.o,$(SRCS))
DEPS := $(patsubst $(SRC_DIR)/%.c,$(DEP_DIR)/%.d,$(SRCS))

.PHONY: all clean

all: myapp

myapp: $(OBJS)
	$(CC) $^ -o $@

$(OBJ_DIR)/%.o: $(SRC_DIR)/%.c $(DEP_DIR)/%.d | $(OBJ_DIR) $(DEP_DIR)
	$(CC) $(DEPFLAGS) $(CFLAGS) -c $< -o $@

$(OBJ_DIR) $(DEP_DIR):
	mkdir -p $@

$(DEPS):

# Include generated dependency files
include $(wildcard $(DEPS))

clean:
	rm -rf $(OBJ_DIR) $(DEP_DIR) myapp

The -MMD -MP -MF flags instruct GCC to write dependency files alongside compilation. The include $(wildcard $(DEPS)) directive pulls them in, so changing a header automatically triggers recompilation of all files that include it. Claude generates this correctly; ChatGPT rarely does without explicit prompting.

Makefile Testing and Validation

Before committing a Makefile to CI, validate it with these checks Claude can help generate:

.PHONY: check-makefile

check-makefile:
	# Verify clean build works
	$(MAKE) clean
	$(MAKE) all
	# Verify incremental build is a no-op (nothing rebuilt)
	$(MAKE) all 2>&1 | grep -c "Nothing to be done" | grep -q 1
	# Verify clean removes all artifacts
	$(MAKE) clean
	test ! -d $(OBJ_DIR)
	@echo "Makefile validation passed"

For CI, add a separate job that runs make --dry-run to catch syntax errors before spending time on a full build:

- name: Validate Makefile
  run: make --dry-run all 2>&1 | head -20

Troubleshooting Common AI-Generated Makefile Issues

Tab vs space errors — Make requires tab characters for recipe lines, not spaces. Most AI tools get this right in the output, but copy-pasting can introduce space indentation. Run cat -A Makefile | grep -n '^\s[^I]' to find offending lines.

Missing order-only prerequisites — If compilation fails because the obj/ directory doesn’t exist, the fix is $(OBJ_DIR)/%.o: $(SRC_DIR)/%.c | $(OBJ_DIR). The pipe separates normal prerequisites from order-only ones. Without it, touching the directory would trigger recompilation of all objects.

= vs := variable assignment — = performs recursive expansion (evaluated on each use), := performs simple expansion (evaluated once at definition). Using = for variables that invoke $(shell ...) causes the shell command to re-run every time the variable is referenced, which is almost always wrong.

Wildcard not expanding in rules — $(wildcard ...) in a recipe doesn’t expand at parse time. Move it to a variable at the top of the Makefile where it evaluates during the initial parsing pass.

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